Ryan Carter

My research focuses on HBM, AI memory, and the investment products designed to capture the growth of memory infrastructure supporting artificial intelligence. I study HBM demand, DRAM exposure, memory manufacturers, packaging technologies, and the relationship between AI workloads and memory requirements. I publish on this website because memory has become a central component of AI computing. Advanced accelerators require increasingly large amounts of high-bandwidth memory, creating a specialized investment theme that differs from broader semiconductor exposure. My work examines HBM-focused ETFs and AI memory strategies, including their holdings, concentration, geographic exposure, and underlying index methodologies. I also compare memory-focused products with broader AI semiconductor funds. I follow HBM technology transitions, capacity expansion, memory pricing, and AI data-center demand to understand how these trends may affect thematic investment products. Through my articles, I aim to explain the relationship between AI memory technology and ETF portfolio construction in a clear and practical way.

Research Field

AI memory ETF analyst specializing in HBM, DRAM, memory manufacturers, AI workloads, packaging, thematic indices, and memory-focused portfolios.

Introduction

Ryan Carter is an AI memory and HBM ETF researcher specializing in investment products connected to the rapidly expanding memory requirements of AI computing.

Ryan studies HBM manufacturers, DRAM exposure, advanced packaging, memory capacity, and AI data-center demand. His research examines how these technology trends are represented within memory-focused and AI semiconductor ETFs.

He compares HBM-themed products with broader AI and semiconductor funds, focusing on holdings concentration, geographic exposure, index methodology, and the degree of direct memory exposure.

Ryan also follows HBM technology transitions, capacity expansion, pricing, and AI infrastructure investment. Through his articles, he explains how developments in AI memory can influence the structure and exposure of thematic investment products.

NAND Layer Count Race: Kioxia’s 332-Layer BiCS10 Sample Delivery

Kioxia’s 332-layer BiCS10 NAND marks a meaningful step in the race to build denser, faster, and more power-efficient flash memory. Yet the most important word in the announcement is not “332.” It is “samples.” The technology has reached functional evaluation, while its commercial significance still depends on manufacturing execution and integration into qualified storage products.

Risk-Adjusted Return Comparison of Emerging vs. Developed Market Semi Indices

When investors compare semiconductor indicators across regions, the first instinct is often to ask which market has delivered the higher return. That is only part of the story. A better question is which market has delivered the better return for the amount of risk taken. Once you look at semiconductors through that lens, the comparison between emerging and developed market semi indicators becomes much more interesting. It is no longer just a race between two groups of stocks. It becomes a study of volatility, drawdowns, cycle sensitivity, and how each market turns uncertainty into performance.

Memory Inventory Digestion Nearing End, Channel Restocking Intentions Strengthen

As the memory cycle of the early–mid 2020s unfolds, one phrase is increasingly heard in industry discussions: the “inventory digest” is nearing its end. For DRAM and NAND makers, module houses, and downstream OEMs, this signals a turning point from prolonged destocking toward a new phase of restocking and channel “restacking.” At the same time, the strength of that restacking intent—how aggressively the supply chain rebuilds inventory and reshapes product mix—will determine the character of the next leg of the memory cycle, from pricing behavior to technology adoption.

Thin Film Deposition Tools (PVD/CVD/ALD) See Surging Demand, Orders Booked into 2027

Thin film deposition sits at the core of modern semiconductor manufacturing, quietly shaping every transistor, interconnect, and memory cell. As chips become more complex and vertically integrated, the demand for high‑performance deposition equipment—especially physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD)—has accelerated. In recent cycles, this demand has reached the point where order books for key tools are being filled well into 2027, signaling both a structural shift in capital expenditure and a sustained confidence in long‑term semiconductor growth.