Richard Evans

I cover specialty gases and semiconductor chemicals used throughout wafer fabrication. My research focuses on the materials required for deposition, etching, cleaning, lithography, and other critical manufacturing processes. I write for this website because semiconductor production depends on a complex chemical supply chain that is often overlooked when discussing chip manufacturing. Even small changes in material purity, availability, or manufacturing capacity can affect production continuity and process performance. My research follows specialty gas demand, electronic chemicals, supply capacity, manufacturing localization, logistics, and the changing material requirements of advanced semiconductor processes. I pay particular attention to materials used in advanced logic, memory, and high-volume manufacturing. I also examine supply-chain resilience and regional manufacturing strategies. As semiconductor production becomes more geographically diversified, chemical and gas suppliers must adapt their production and distribution networks. My goal is to help readers understand the materials infrastructure behind semiconductor manufacturing and the market forces influencing specialty chemical and gas suppliers.

Research Field

Semiconductor materials analyst covering specialty gases, electronic chemicals, deposition, etching, cleaning, supply chains, and manufacturing localization.

Introduction

Richard Evans is a semiconductor materials analyst focused on specialty gases and electronic chemicals used throughout wafer fabrication. His research covers materials used in deposition, etching, cleaning, lithography, and other critical manufacturing processes.

Richard examines specialty gas demand, electronic chemical consumption, material purity, production capacity, logistics, and supplier development. His coverage spans advanced logic, memory, and high-volume semiconductor manufacturing.

Supply-chain resilience is a major theme in his research. Semiconductor manufacturing is becoming more geographically distributed, creating new requirements for local material production, storage, transportation, and supply security.

Richard also follows the increasing material requirements associated with advanced process technologies. Through his articles, he explains how semiconductor manufacturing trends translate into demand for specialty gases and chemicals and how suppliers are adapting to changes in the global chip industry.

SK Hynix Q2 DRAM ASP Up 30%: The AI Server Demand Curve

SK hynix’s second-quarter DRAM pricing tells a broader story than the success of high-bandwidth memory alone. The company reported that DRAM average selling prices rose approximately 30% sequentially in the April–June 2026 quarter, with management attributing the increase primarily to continued strength in conventional DRAM. DRAM bit shipments increased by a high-single-digit percentage.

2026 Global Semi Equipment Market Forecasts: A Summary of Institutional Divergence

The 2026 global semiconductor equipment market sits at the intersection of multiple, sometimes conflicting forces: post-downturn recovery, structural demand from AI and automotive, technology transitions at advanced nodes, and ongoing geopolitical constraints. Institutions that track and forecast this market—industry associations, research houses, banks, and policy bodies—do not agree on a single trajectory. Instead, their forecasts diverge along several axes: size of the rebound from recent softness, sustainability of capital expenditure cycles, and the regional composition of spending.

Advanced Packaging Equipment Growth Outpaces Front-End Equipment for the First Time

For decades, the center of gravity in semiconductor capital spending has lived squarely in the front end of the line—lithography, etch, deposition, and other wafer‑fab tools. Packaging was often treated as an afterthought: necessary, but secondary. That hierarchy is now changing. For the first time, growth in advanced packaging equipment is outpacing growth in traditional front end equipment, signaling a structural shift in how performance, cost, and innovation are created in the chip industry.

Materials Segment’s Elasticity Coefficient Far Exceeds Design Segment in Upswing

When the semiconductor industry enters an upswing, not all segments respond in the same way. Revenue and profit growth in chip design, manufacturing, equipment, and materials move at different speeds and magnitudes. One of the most striking patterns observed across cycles is how strongly materials segments react compared with the design segment: their “elasticity coefficient” with respect to industry upturns often far exceeds that of design. Put simply, when the cycle turns up, materials businesses frequently grow faster and more sharply than fabless design houses, even though both benefit from rising demand.

Panel-Level Packaging (PLP) vs. Wafer-Level (WLP): The Cost Battle

Advanced packaging has become one of the most important battlegrounds in semiconductors, and nowhere is that clearer than in the contest between panel level packaging and wafer level packaging. Both approaches aim to make packages smaller, denser, and more capable of supporting heterogeneous integration, but they do so with very different economics. That is why the PLP versus WLP debate is not just a technical comparison; it is a cost battle that will shape which applications scale fastest in the years ahead.

The Disruptive Impact of CXL Memory Pooling on Enterprise Storage Architecture

Compute Express Link (CXL) is rapidly emerging as one of the most transformative technologies in enterprise infrastructure, and memory pooling is at the heart of its disruptive potential. By decoupling memory from individual servers and exposing it as a shared, dynamically allocable resource, CXL memory pooling challenges long‑standing assumptions about how enterprises design, deploy, and manage both compute and storage.

New EDA Challenges and Tool Iterations Driven by Advanced Packaging

Advanced packaging has changed the semiconductor design flow in a way that feels subtle at first and then suddenly unavoidable. What used to be the back end of the line—package selection, assembly, and test—has become a co-equal design domain alongside logic, memory, and interconnect. As heterogeneous integration moves from a niche practice to the default architecture for high-end AI, HPC, networking, and mobile systems, EDA tools are being pushed far beyond their traditional boundaries.